Our proprietary framework benchmarks 8 models across 50+ experiments to find optimal CMP parameters — balancing high material removal rate (MRR > 140 μm/h) with ultra-smooth surfaces (Ra < 0.13 nm).
SiC is a core third-generation semiconductor material with outstanding properties for power electronics and RF devices. CMP is the only effective method to achieve nanometre-level ultra-smooth SiC wafer surfaces. Traditional methods rely on costly trial-and-error — our ML approach cuts development cycles from months to days.
50+ experiments across 8 key CMP parameters: CeO₂ concentration, H₂O— concentration, slurry pH, polishing pressure, head RPM, platen RPM, slurry flow rate, polishing time
Min-Max normalisation to eliminate dimensional effects, outlier detection via box plots, Pearson correlation analysis to guide model selection
Comparative analysis of 8 architectures: Linear Regression, Random Forest, XGBoost, MLP, BNN, Gaussian Process, 5-MLP-PFE, Bayesian Optimisation
SHAP analysis for parameter importance, new experimental validation, surface characterisation, and FEM simulation of 8-inch SiC wafers
Finite element modelling of 8-inch SiC wafers validates stress distribution, equivalent deformation, and wafer warp — confirming ML predictions with physics-based simulation.
Let our ML framework optimise your polishing parameters — achieving results in days that would take months of manual experimentation.
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